Switch cores of this general type are well known to those skilled in the art, and moreover, the operation of an optical backplane and/or apparatus for use therewith is described in co-pending Patent Application Nos. GB 2353157A, and GB 2362280A, to which attention is hereby directed. Accordingly, neither detailed switch core description nor detailed optical backplane description herein, is believed to be necessary.
The capacity of the apparatus described in GB2362280A is limited by the throughput of the optical backplane. Typically this is 5 Terabit/s. However in the future, higher capacity switch cores will be required and these can be achieved by the interconnection of a plurality of 5 Terabit/s switch nodes so that any one or more of the ingress ports of any one of such nodes can be selectively connected to the egress port or ports of any other of such nodes via a static Petabit/s optical connection bus. One object of the present invention, therefore is to provide an optical interconnection system to satisfy this particular requirement. It should however be understood, that the present invention may also find more general application in communication systems.